Half day intensive course on Reconfigurable Radio-Frequency Transceivers
Place: École Polytechnique de Montréal, Pavillon lassonde, M-2103
Date and time: Thursday May 8th, 2014, 09:00 am – 12:00 noon
Hossein Hashemi is an Associate Professor of Engineering, Ming Hsieh Faculty Fellow, and the co-director of the Ming Hsieh Institute and the Ultimate Radio Laboratory (UltRa-Lab) at the University of Southern California. He received the B.S. and M.S. degrees in Electronics Engineering from the Sharif University of Technology, Tehran, Iran, in 1997 and 1999, respectively, and the M.S. and Ph.D. degrees in Electrical Engineering from the California Institute of Technology, Pasadena, in 2001 and 2003, respectively. Dr. Hashemi currently serves on the Technical Program Committees of IEEE International Solid-State Circuits Conference (ISSCC), IEEE Radio Frequency Integrated Circuits (RFIC) Symposium, and the IEEE Compound Semiconductor Integrated Circuits Symposium (CSICS). He is also an Associate Editor for the IEEE Journal of Solid state Circuits (2013 – present), and Guest Editor of the same journal for October 2013 and December 2013 issues. He was an Associate Editor for the IEEE Transactions on Circuits and Systems—Part I: Regular Papers (2006–2007) and an Associate Editor for the IEEE Transactions on Circuits and Systems—Part II: Express Briefs (2004–2005). He was the recipient of the 2008 Defense Advanced Research Projects Agency (DARPA) Young Faculty Award and the National Science Foundation (NSF) CAREER Award. He received the USC Viterbi School of Engineering Junior Faculty Research Award in 2008, and was recognized as a Distinguished Scholar for the Outstanding Achievement in Advancement of Engineering by the Association of Professors and Scholars of Iranian Heritage in 2011. He was a co-recipient of the 2004 IEEE Journal of Solid-State Circuits Best Paper Award for “A Fully-Integrated 24 GHz 8-Element Phased-Array Receiver in Silicon” and the 2007 IEEE International Solid-State Circuits Conference (ISSCC) Lewis Winner Award for Outstanding Paper for “A Fully Integrated 24 GHz 4-Channel Phased-Array Transceiver in 0.13um CMOS based on a Variable Phase Ring Oscillator and PLL Architecture”. He is the co-editor of the book “Millimeter-Wave Silicon Technology: 60 GHz and Beyond” published by Springer in 2008.
Modern commercial and military wireless systems should support various waveforms and standards under dynamically changing electromagnetic environments. A straight forward Software-Defined Radio (SDR) enables changing the radio parameters, such as carrier frequency, modulation format, and signal bandwidth, in a fixed architecture, through software. A more advanced reconfigurable radio enables changing the architecture of the transceiver and/or the individual building blocks in order to optimize the performance while minimizing the power consumption. Architectural level reconfigurability reduce the Non-Recurring Engineering (NRE) cost associated with the design of a new transceiver tailored to a specific application. Moreover, dynamic adjustment of radio architecture and specifications can be in response to, for instance, varying signal to noise ratio levels, locations and powers of interference and jamming signals, etc. This talk covers several examples of reconfigurable radio-frequency transceivers implemented in CMOS technology.
-IEEE-SSCS Montreal Chapter
-Dept of Elec. Eng., Polytechnique Montreal
09:00 am to 10:30 am: Lecture
10:30 am – 10:45 am: Break
10:45 am to noon: Lecture
To register please send an e-mail include following information to Mrs. Marie-Yannick Laplante on marie-yannick.laplante@
– Your Name
– The Institute, University and Department.
– Your IEEE Membership Number (if you are member) or Student ID (for students)
For more information and for any question please do not hesitate to contact Ghazal Nabovati (email@example.com)